diff --git a/Hardware/LA32R.sim/sim_1/behav/xsim/webtalk.jou b/Hardware/LA32R.sim/sim_1/behav/xsim/webtalk.jou
index 55d08e5..7092b2b 100644
--- a/Hardware/LA32R.sim/sim_1/behav/xsim/webtalk.jou
+++ b/Hardware/LA32R.sim/sim_1/behav/xsim/webtalk.jou
@@ -2,8 +2,8 @@
 # Webtalk v2018.1 (64-bit)
 # SW Build 2188600 on Wed Apr  4 18:40:38 MDT 2018
 # IP Build 2185939 on Wed Apr  4 20:55:05 MDT 2018
-# Start of session at: Wed Jun 18 18:14:22 2025
-# Process ID: 41168
+# Start of session at: Wed Jun 18 18:21:59 2025
+# Process ID: 8708
 # Current directory: D:/Schoolwork/ComputerComposition/LA32R/Hardware/LA32R.sim/sim_1/behav/xsim
 # Command line: wbtcv.exe -mode batch -source D:/Schoolwork/ComputerComposition/LA32R/Hardware/LA32R.sim/sim_1/behav/xsim/xsim.dir/cpu_tb_snapshot/webtalk/xsim_webtalk.tcl -notrace
 # Log file: D:/Schoolwork/ComputerComposition/LA32R/Hardware/LA32R.sim/sim_1/behav/xsim/webtalk.log
diff --git a/Hardware/LA32R.sim/sim_1/behav/xsim/webtalk_42736.backup.jou b/Hardware/LA32R.sim/sim_1/behav/xsim/webtalk_35000.backup.jou
similarity index 92%
rename from Hardware/LA32R.sim/sim_1/behav/xsim/webtalk_42736.backup.jou
rename to Hardware/LA32R.sim/sim_1/behav/xsim/webtalk_35000.backup.jou
index e7d9c88..c7854d2 100644
--- a/Hardware/LA32R.sim/sim_1/behav/xsim/webtalk_42736.backup.jou
+++ b/Hardware/LA32R.sim/sim_1/behav/xsim/webtalk_35000.backup.jou
@@ -2,8 +2,8 @@
 # Webtalk v2018.1 (64-bit)
 # SW Build 2188600 on Wed Apr  4 18:40:38 MDT 2018
 # IP Build 2185939 on Wed Apr  4 20:55:05 MDT 2018
-# Start of session at: Wed Jun 18 18:14:18 2025
-# Process ID: 42736
+# Start of session at: Wed Jun 18 18:21:55 2025
+# Process ID: 35000
 # Current directory: D:/Schoolwork/ComputerComposition/LA32R/Hardware/LA32R.sim/sim_1/behav/xsim
 # Command line: wbtcv.exe -mode batch -source D:/Schoolwork/ComputerComposition/LA32R/Hardware/LA32R.sim/sim_1/behav/xsim/xsim.dir/cpu_tb_snapshot/webtalk/xsim_webtalk.tcl -notrace
 # Log file: D:/Schoolwork/ComputerComposition/LA32R/Hardware/LA32R.sim/sim_1/behav/xsim/webtalk.log
diff --git a/Hardware/LA32R.sim/sim_1/behav/xsim/xsim.dir/cpu_tb_snapshot/xsim.mem b/Hardware/LA32R.sim/sim_1/behav/xsim/xsim.dir/cpu_tb_snapshot/xsim.mem
index 3e0697d..4fc066e 100644
Binary files a/Hardware/LA32R.sim/sim_1/behav/xsim/xsim.dir/cpu_tb_snapshot/xsim.mem and b/Hardware/LA32R.sim/sim_1/behav/xsim/xsim.dir/cpu_tb_snapshot/xsim.mem differ
diff --git a/Hardware/LA32R.sim/sim_1/behav/xsim/xsim.jou b/Hardware/LA32R.sim/sim_1/behav/xsim/xsim.jou
index 8337b8d..eecfdb6 100644
--- a/Hardware/LA32R.sim/sim_1/behav/xsim/xsim.jou
+++ b/Hardware/LA32R.sim/sim_1/behav/xsim/xsim.jou
@@ -2,8 +2,8 @@
 # xsim v2018.1 (64-bit)
 # SW Build 2188600 on Wed Apr  4 18:40:38 MDT 2018
 # IP Build 2185939 on Wed Apr  4 20:55:05 MDT 2018
-# Start of session at: Wed Jun 18 18:14:19 2025
-# Process ID: 2304
+# Start of session at: Wed Jun 18 18:21:56 2025
+# Process ID: 43956
 # Current directory: D:/Schoolwork/ComputerComposition/LA32R/Hardware/LA32R.sim/sim_1/behav/xsim
 # Command line: xsim.exe -log ..\..\..\..\..\simulation.log -mode tcl -source {xsim.dir/cpu_tb_snapshot/xsim_script.tcl}
 # Log file: D:/Schoolwork/ComputerComposition/LA32R/Hardware/LA32R.sim/sim_1/behav/xsim/../../../../../simulation.log
diff --git a/Hardware/LA32R.srcs/sim_1/new/cpu_tb.v b/Hardware/LA32R.srcs/sim_1/new/cpu_tb.v
index 402e433..5ee2fae 100644
--- a/Hardware/LA32R.srcs/sim_1/new/cpu_tb.v
+++ b/Hardware/LA32R.srcs/sim_1/new/cpu_tb.v
@@ -38,6 +38,7 @@ module cpu_tb;
     // --- 信号声明 ---
     reg clk; // 时钟信号
     reg rst; // 复位信号
+    integer i; // 用于for循环的变量
 
     // --- 实例化待测设计 (DUT - Design Under Test) ---
     // 将cpu_top模块实例化为uut (unit under test)
@@ -72,7 +73,7 @@ module cpu_tb;
         $display("                仿真结束。最终寄存器状态如下:                 ");
         $display("------------------------------------------------------------");
         // 使用循环遍历寄存器堆，并通过$display显示其值。注意hierarchical path的正确性。
-        for (integer i = 0; i < 32; i = i + 1) begin
+        for (i = 0; i < 32; i = i + 1) begin
             // 为了简化输出，仅显示值非零的寄存器。
             if (uut.u_reg_file.registers[i] != 32'h00000000) begin
                 $display("寄存器 R%0d: 0x%08h", i, uut.u_reg_file.registers[i]);