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2025-11-06 09:20:56 +08:00
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CircuitExp3/CircuitExp3-PSpiceFiles/SCHEMATIC1/ExpSim3.sim Normal file
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@OrCAD Simulation Server Version: 1.0
@Settings: 3 1
@General:
ProfileName= "ExpSim3"
ProfileFile= "ExpSim3.sim"
Connectivity= "SCHEMATIC1.net"
NetlistFile= "ExpSim3.cir"
DataFile= "ExpSim3.dat"
OutFile= "ExpSim3.out"
Notes=
@#$BEGINNOTES
@#$ENDNOTES
@End General
@Analysis: 0 0
+0 0 0 0
+0 "1000ns"
+1 ""
+2 "0"
+3 ""
+4 ""
+5 ""
+6 ""
@End Analysis
@Analysis: 1 0
+2 0 0
+0 ""
+1 ""
+2 ""
+3 ""
+4 ""
+5 ""
@End Analysis
@Analysis: 2 0
+0 0
+0 ""
+1 ""
+2 ""
+3 ""
+4 ""
+5 ""
+6 ""
+7 ""
@End Analysis
@Analysis: 3 1
+1 0 0
+0 ""
+1 ""
+2 ""
@End Analysis
@Analysis: 4 0
+0 0 1 0 0 0 3 0 0 0 1
+0 ""
+1 ""
+2 ""
+3 ""
+4 ""
+5 ""
+6 ""
+7 ""
LoadFile 0 ""
SaveFile 0 ""
@End Analysis
@Analysis: 5 0
+0 0
+0 ""
+1 ""
+2 ""
+3 ""
+4 ""
+5 ""
+6 ""
+7 ""
@End Analysis
@Analysis: 6 0
+1
+0 ""
@End Analysis
@Analysis: 7 0
+0 0
+0 ""
+1 ""
+2 ""
+3 ""
+4 ""
+5 ""
@End Analysis
@Analysis: 8 0
+0
+0 ""
+1 ""
+2 ""
+3 ""
+4 ""
+5 ""
@End Analysis
@Analysis: 9 0
+0 ""
@End Analysis
@Analysis: 10 0
+0 0
+0 ""
+1 ""
+2 ""
+3 ""
+4 ""
+5 ""
+6 ""
+7 ""
@End Analysis
@Analysis: 11 1
+ 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
+ 0 0 0 0 0 0 0 0 0
@End Analysis
@Analysis: 12 0
+2236960 0
@End Analysis
@Analysis: 13 1
+0 1 1 0
@End Analysis
@Analysis: 14 1
+1 1 1 "*"
@End Analysis
@Analysis: 15 0
@End Analysis
@Analysis: 16 0
+0 "0"
+1 "0"
+2 "chkpt_default, , ,"
@End Analysis
@Analysis: 17 0
+0 "-1"
+1 ""
+2 "-1"
+3 "-1"
+4 "1"
@End Analysis

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CircuitExp3/CircuitExp3-PSpiceFiles/SCHEMATIC1/ExpSim3/ExpSim3.cir Normal file
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** Profile: "SCHEMATIC1-ExpSim3" [ F:\Schoolwork\AnalogCircuit\CircuitExp3\CircuitExp3-PSpiceFiles\SCHEMATIC1\ExpSim3.sim ]
** Creating circuit file "ExpSim3.cir"
** WARNING: THIS AUTOMATICALLY GENERATED FILE MAY BE OVERWRITTEN BY SUBSEQUENT SIMULATIONS
*Libraries:
* Profile Libraries :
* Local Libraries :
* From [PSPICE NETLIST] section of D:\OrCAD\OrCAD_16.5_Lite\tools\pspice\PSpice.ini file:
.lib "nomd.lib"
*Analysis directives:
.OP
.PROBE V(alias(*)) I(alias(*)) W(alias(*)) D(alias(*)) NOISE(alias(*))
.INC "..\SCHEMATIC1.net"
.END

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CircuitExp3/CircuitExp3-PSpiceFiles/SCHEMATIC1/ExpSim3/ExpSim3.out Normal file
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**** 11/27/24 05:07:59 ******* PSpice Lite (April 2011) ******* ID# 10813 ****
** Profile: "SCHEMATIC1-ExpSim3" [ F:\Schoolwork\AnalogCircuit\CircuitExp3\CircuitExp3-PSpiceFiles\SCHEMATIC1\ExpSim3.sim ]
**** CIRCUIT DESCRIPTION
******************************************************************************
** Creating circuit file "ExpSim3.cir"
** WARNING: THIS AUTOMATICALLY GENERATED FILE MAY BE OVERWRITTEN BY SUBSEQUENT SIMULATIONS
*Libraries:
* Profile Libraries :
* Local Libraries :
* From [PSPICE NETLIST] section of D:\OrCAD\OrCAD_16.5_Lite\tools\pspice\PSpice.ini file:
.lib "nomd.lib"
*Analysis directives:
.OP
.PROBE V(alias(*)) I(alias(*)) W(alias(*)) D(alias(*)) NOISE(alias(*))
.INC "..\SCHEMATIC1.net"
**** INCLUDING SCHEMATIC1.net ****
* source CIRCUITEXP3
R_R1 N00147 N00156 470 TC=0,0
R_R2 N00156 N00170 100 TC=0,0
R_R3 0 N00156 200 TC=0,0
V_V1 N00147 0 10Vdc
V_V2 N00170 0 5Vdc
V_V3 N00616 0 10Vdc
R_R5 N00626 0 100 TC=0,0
R_R6 0 N00626 200 TC=0,0
R_R4 N00616 N00626 470 TC=0,0
V_V5 N01002 0 5Vdc
R_R8 N00988 N01002 100 TC=0,0
R_R9 0 N00988 200 TC=0,0
R_R7 0 N00988 470 TC=0,0
V_V6 N01457 0 5Vdc
R_R11 N01475 0 100 TC=0,0
R_R10 N01457 N01475 470 TC=0,0
R_R12 0 N01475 200 TC=0,0
V_V7 N01878 0 10Vdc
V_V8 N01902 0 5Vdc
R_R13 N01878 N01888 470 TC=0,0
R_R14 N01888 N01902 100 TC=0,0
R_R17 0 N02307 100 TC=0,0
R_R16 N02283 0 470 TC=0,0
V_V10 N02307 0 5Vdc
V_V9 N02283 0 10Vdc
R_Ro N03369 N03376 82.449 TC=0,0
R_R200 0 N03376 200 TC=0,0
V_Uoc N03369 0 5.877Vdc
**** RESUMING ExpSim3.cir ****
.END
**** 11/27/24 05:07:59 ******* PSpice Lite (April 2011) ******* ID# 10813 ****
** Profile: "SCHEMATIC1-ExpSim3" [ F:\Schoolwork\AnalogCircuit\CircuitExp3\CircuitExp3-PSpiceFiles\SCHEMATIC1\ExpSim3.sim ]
**** SMALL SIGNAL BIAS SOLUTION TEMPERATURE = 27.000 DEG C
******************************************************************************
NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE NODE VOLTAGE
(N00147) 10.0000 (N00156) 4.1615 (N00170) 5.0000 (N00616) 10.0000
(N00626) 1.2422 (N00988) 2.9193 (N01002) 5.0000 (N01457) 5.0000
(N01475) .6211 (N01878) 10.0000 (N01888) 5.8772 (N01902) 5.0000
(N02283) 10.0000 (N02307) 5.0000 (N03369) 5.8770 (N03376) 4.1615
VOLTAGE SOURCE CURRENTS
NAME CURRENT
V_V1 -1.242E-02
V_V2 -8.385E-03
V_V3 -1.863E-02
V_V5 -2.081E-02
V_V6 -9.317E-03
V_V7 -8.772E-03
V_V8 8.772E-03
V_V10 -5.000E-02
V_V9 -2.128E-02
V_Uoc -2.081E-02
TOTAL POWER DISSIPATION 1.13E+00 WATTS
**** 11/27/24 05:07:59 ******* PSpice Lite (April 2011) ******* ID# 10813 ****
** Profile: "SCHEMATIC1-ExpSim3" [ F:\Schoolwork\AnalogCircuit\CircuitExp3\CircuitExp3-PSpiceFiles\SCHEMATIC1\ExpSim3.sim ]
**** OPERATING POINT INFORMATION TEMPERATURE = 27.000 DEG C
******************************************************************************
JOB CONCLUDED
**** 11/27/24 05:07:59 ******* PSpice Lite (April 2011) ******* ID# 10813 ****
** Profile: "SCHEMATIC1-ExpSim3" [ F:\Schoolwork\AnalogCircuit\CircuitExp3\CircuitExp3-PSpiceFiles\SCHEMATIC1\ExpSim3.sim ]
**** JOB STATISTICS SUMMARY
******************************************************************************
Total job time (using Solver 1) = 0.00

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CircuitExp3/CircuitExp3-PSpiceFiles/SCHEMATIC1/SCHEMATIC1.ALS Normal file
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.ALIASES
R_R1 R1(1=N00147 2=N00156 ) CN @CIRCUITEXP3.SCHEMATIC1(sch_1):INS26@ANALOG.R.Normal(chips)
R_R2 R2(1=N00156 2=N00170 ) CN @CIRCUITEXP3.SCHEMATIC1(sch_1):INS51@ANALOG.R.Normal(chips)
R_R3 R3(1=0 2=N00156 ) CN @CIRCUITEXP3.SCHEMATIC1(sch_1):INS76@ANALOG.R.Normal(chips)
V_V1 V1(+=N00147 -=0 ) CN @CIRCUITEXP3.SCHEMATIC1(sch_1):INS101@SOURCE.VDC.Normal(chips)
V_V2 V2(+=N00170 -=0 ) CN @CIRCUITEXP3.SCHEMATIC1(sch_1):INS117@SOURCE.VDC.Normal(chips)
V_V3 V3(+=N00616 -=0 ) CN @CIRCUITEXP3.SCHEMATIC1(sch_1):INS566@SOURCE.VDC.Normal(chips)
R_R5 R5(1=N00626 2=0 ) CN @CIRCUITEXP3.SCHEMATIC1(sch_1):INS526@ANALOG.R.Normal(chips)
R_R6 R6(1=0 2=N00626 ) CN @CIRCUITEXP3.SCHEMATIC1(sch_1):INS546@ANALOG.R.Normal(chips)
R_R4 R4(1=N00616 2=N00626 ) CN @CIRCUITEXP3.SCHEMATIC1(sch_1):INS506@ANALOG.R.Normal(chips)
V_V5 V5(+=N01002 -=0 ) CN @CIRCUITEXP3.SCHEMATIC1(sch_1):INS948@SOURCE.VDC.Normal(chips)
R_R8 R8(1=N00988 2=N01002 ) CN @CIRCUITEXP3.SCHEMATIC1(sch_1):INS888@ANALOG.R.Normal(chips)
R_R9 R9(1=0 2=N00988 ) CN @CIRCUITEXP3.SCHEMATIC1(sch_1):INS908@ANALOG.R.Normal(chips)
R_R7 R7(1=0 2=N00988 ) CN @CIRCUITEXP3.SCHEMATIC1(sch_1):INS868@ANALOG.R.Normal(chips)
V_V6 V6(+=N01457 -=0 ) CN @CIRCUITEXP3.SCHEMATIC1(sch_1):INS1435@SOURCE.VDC.Normal(chips)
R_R11 R11(1=N01475 2=0 ) CN @CIRCUITEXP3.SCHEMATIC1(sch_1):INS1393@ANALOG.R.Normal(chips)
R_R10 R10(1=N01457 2=N01475 ) CN @CIRCUITEXP3.SCHEMATIC1(sch_1):INS1373@ANALOG.R.Normal(chips)
R_R12 R12(1=0 2=N01475 ) CN @CIRCUITEXP3.SCHEMATIC1(sch_1):INS1415@ANALOG.R.Normal(chips)
V_V7 V7(+=N01878 -=0 ) CN @CIRCUITEXP3.SCHEMATIC1(sch_1):INS1828@SOURCE.VDC.Normal(chips)
V_V8 V8(+=N01902 -=0 ) CN @CIRCUITEXP3.SCHEMATIC1(sch_1):INS1848@SOURCE.VDC.Normal(chips)
R_R13 R13(1=N01878 2=N01888 ) CN @CIRCUITEXP3.SCHEMATIC1(sch_1):INS1768@ANALOG.R.Normal(chips)
R_R14 R14(1=N01888 2=N01902 ) CN @CIRCUITEXP3.SCHEMATIC1(sch_1):INS1788@ANALOG.R.Normal(chips)
R_R17 R17(1=0 2=N02307 ) CN @CIRCUITEXP3.SCHEMATIC1(sch_1):INS2213@ANALOG.R.Normal(chips)
R_R16 R16(1=N02283 2=0 ) CN @CIRCUITEXP3.SCHEMATIC1(sch_1):INS2193@ANALOG.R.Normal(chips)
V_V10 V10(+=N02307 -=0 ) CN @CIRCUITEXP3.SCHEMATIC1(sch_1):INS2261@SOURCE.VDC.Normal(chips)
V_V9 V9(+=N02283 -=0 ) CN @CIRCUITEXP3.SCHEMATIC1(sch_1):INS2233@SOURCE.VDC.Normal(chips)
R_Ro Ro(1=N03369 2=N03376 ) CN @CIRCUITEXP3.SCHEMATIC1(sch_1):INS3141@ANALOG.R.Normal(chips)
R_R200 R200(1=0 2=N03376 ) CN @CIRCUITEXP3.SCHEMATIC1(sch_1):INS3166@ANALOG.R.Normal(chips)
V_Uoc Uoc(+=N03369 -=0 ) CN @CIRCUITEXP3.SCHEMATIC1(sch_1):INS3285@SOURCE.VDC.Normal(chips)
.ENDALIASES

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CircuitExp3/CircuitExp3-PSpiceFiles/SCHEMATIC1/SCHEMATIC1.net Normal file
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* source CIRCUITEXP3
R_R1 N00147 N00156 470 TC=0,0
R_R2 N00156 N00170 100 TC=0,0
R_R3 0 N00156 200 TC=0,0
V_V1 N00147 0 10Vdc
V_V2 N00170 0 5Vdc
V_V3 N00616 0 10Vdc
R_R5 N00626 0 100 TC=0,0
R_R6 0 N00626 200 TC=0,0
R_R4 N00616 N00626 470 TC=0,0
V_V5 N01002 0 5Vdc
R_R8 N00988 N01002 100 TC=0,0
R_R9 0 N00988 200 TC=0,0
R_R7 0 N00988 470 TC=0,0
V_V6 N01457 0 5Vdc
R_R11 N01475 0 100 TC=0,0
R_R10 N01457 N01475 470 TC=0,0
R_R12 0 N01475 200 TC=0,0
V_V7 N01878 0 10Vdc
V_V8 N01902 0 5Vdc
R_R13 N01878 N01888 470 TC=0,0
R_R14 N01888 N01902 100 TC=0,0
R_R17 0 N02307 100 TC=0,0
R_R16 N02283 0 470 TC=0,0
V_V10 N02307 0 5Vdc
V_V9 N02283 0 10Vdc
R_Ro N03369 N03376 82.449 TC=0,0
R_R200 0 N03376 200 TC=0,0
V_Uoc N03369 0 5.877Vdc

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CircuitExp3/CircuitExp3-PSpiceFiles/SCHEMATIC1/SCHEMATIC1_sch.prp Normal file
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@@ -0,0 +1,316 @@
("FILE_TYPE" "PMAP File"
("devices"
("R")
("VDC")
)
("instances"
("R1"
("device_name" "R")
("pspice_path" "R_R1")
("level" "0")
("model_params"
("VALUE"
("value" "470")
("pspice_param" "VALUE")
)
)
)
("R2"
("device_name" "R")
("pspice_path" "R_R2")
("level" "0")
("model_params"
("VALUE"
("value" "100")
("pspice_param" "VALUE")
)
)
)
("R3"
("device_name" "R")
("pspice_path" "R_R3")
("level" "0")
("model_params"
("VALUE"
("value" "200")
("pspice_param" "VALUE")
)
)
)
("V1"
("device_name" "VDC")
("pspice_path" "V_V1")
("level" "0")
("model_params"
("DC"
("value" "10Vdc")
("pspice_param" "DC")
)
)
)
("V2"
("device_name" "VDC")
("pspice_path" "V_V2")
("level" "0")
("model_params"
("DC"
("value" "5Vdc")
("pspice_param" "DC")
)
)
)
("V3"
("device_name" "VDC")
("pspice_path" "V_V3")
("level" "0")
("model_params"
("DC"
("value" "10Vdc")
("pspice_param" "DC")
)
)
)
("R5"
("device_name" "R")
("pspice_path" "R_R5")
("level" "0")
("model_params"
("VALUE"
("value" "100")
("pspice_param" "VALUE")
)
)
)
("R6"
("device_name" "R")
("pspice_path" "R_R6")
("level" "0")
("model_params"
("VALUE"
("value" "200")
("pspice_param" "VALUE")
)
)
)
("R4"
("device_name" "R")
("pspice_path" "R_R4")
("level" "0")
("model_params"
("VALUE"
("value" "470")
("pspice_param" "VALUE")
)
)
)
("V5"
("device_name" "VDC")
("pspice_path" "V_V5")
("level" "0")
("model_params"
("DC"
("value" "5Vdc")
("pspice_param" "DC")
)
)
)
("R8"
("device_name" "R")
("pspice_path" "R_R8")
("level" "0")
("model_params"
("VALUE"
("value" "100")
("pspice_param" "VALUE")
)
)
)
("R9"
("device_name" "R")
("pspice_path" "R_R9")
("level" "0")
("model_params"
("VALUE"
("value" "200")
("pspice_param" "VALUE")
)
)
)
("R7"
("device_name" "R")
("pspice_path" "R_R7")
("level" "0")
("model_params"
("VALUE"
("value" "470")
("pspice_param" "VALUE")
)
)
)
("V6"
("device_name" "VDC")
("pspice_path" "V_V6")
("level" "0")
("model_params"
("DC"
("value" "5Vdc")
("pspice_param" "DC")
)
)
)
("R11"
("device_name" "R")
("pspice_path" "R_R11")
("level" "0")
("model_params"
("VALUE"
("value" "100")
("pspice_param" "VALUE")
)
)
)
("R10"
("device_name" "R")
("pspice_path" "R_R10")
("level" "0")
("model_params"
("VALUE"
("value" "470")
("pspice_param" "VALUE")
)
)
)
("R12"
("device_name" "R")
("pspice_path" "R_R12")
("level" "0")
("model_params"
("VALUE"
("value" "200")
("pspice_param" "VALUE")
)
)
)
("V7"
("device_name" "VDC")
("pspice_path" "V_V7")
("level" "0")
("model_params"
("DC"
("value" "10Vdc")
("pspice_param" "DC")
)
)
)
("V8"
("device_name" "VDC")
("pspice_path" "V_V8")
("level" "0")
("model_params"
("DC"
("value" "5Vdc")
("pspice_param" "DC")
)
)
)
("R13"
("device_name" "R")
("pspice_path" "R_R13")
("level" "0")
("model_params"
("VALUE"
("value" "470")
("pspice_param" "VALUE")
)
)
)
("R14"
("device_name" "R")
("pspice_path" "R_R14")
("level" "0")
("model_params"
("VALUE"
("value" "100")
("pspice_param" "VALUE")
)
)
)
("R17"
("device_name" "R")
("pspice_path" "R_R17")
("level" "0")
("model_params"
("VALUE"
("value" "100")
("pspice_param" "VALUE")
)
)
)
("R16"
("device_name" "R")
("pspice_path" "R_R16")
("level" "0")
("model_params"
("VALUE"
("value" "470")
("pspice_param" "VALUE")
)
)
)
("V10"
("device_name" "VDC")
("pspice_path" "V_V10")
("level" "0")
("model_params"
("DC"
("value" "5Vdc")
("pspice_param" "DC")
)
)
)
("V9"
("device_name" "VDC")
("pspice_path" "V_V9")
("level" "0")
("model_params"
("DC"
("value" "10Vdc")
("pspice_param" "DC")
)
)
)
("Ro"
("device_name" "R")
("pspice_path" "R_Ro")
("level" "0")
("model_params"
("VALUE"
("value" "82.449")
("pspice_param" "VALUE")
)
)
)
("R200"
("device_name" "R")
("pspice_path" "R_R200")
("level" "0")
("model_params"
("VALUE"
("value" "200")
("pspice_param" "VALUE")
)
)
)
("Uoc"
("device_name" "VDC")
("pspice_path" "V_Uoc")
("level" "0")
("model_params"
("DC"
("value" "5.877Vdc")
("pspice_param" "DC")
)
)
)
)
)

70
CircuitExp3/CircuitExp3.opj Normal file
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(ExpressProject "CircuitExp3"
(ProjectVersion "19981106")
(ProjectType "Analog or A/D Mixed Mode")
(Folder "Design Resources"
(Folder "Library")
(NoModify)
(File ".\circuitexp3.dsn"
(Type "Schematic Design"))
(BuildFileAddedOrDeleted "x")
(CompileFileAddedOrDeleted "x")
(PSPICE_Regenerate_Netlist_Flag "FALSE"))
(Folder "Outputs"
(File ".\circuitexp3-pspicefiles\schematic1\schematic1.net"
(Type "Report")))
(Folder "PSpice Resources"
(Folder "Simulation Profiles"
(ActiveProfile ".\circuitexp3-pspicefiles\schematic1\expsim3.sim")
(File.PSpice.{09528990-3187-11D2-BC7B-00A0C90CBF91}
".\circuitexp3-pspicefiles\schematic1\expsim3.sim"
(DisplayName "SCHEMATIC1-ExpSim3")
(Type "PSpice Profile")))
(Folder "Model Libraries"
(Sort User))
(Folder "Stimulus Files"
(Sort User))
(Folder "Include Files"
(Sort User)))
(DefaultLibraryBrowseDirectory "library\PSpice")
(PartMRUSelector
(0
(LibraryName "D:\ORCAD\ORCAD_16.5_LITE\TOOLS\CAPTURE\LIBRARY\CAPSYM.OLB")
(DeviceIndex "0"))
(VDC
(FullPartName "VDC.Normal")
(LibraryName
"D:\ORCAD\ORCAD_16.5_LITE\TOOLS\CAPTURE\LIBRARY\PSPICE\SOURCE.OLB")
(DeviceIndex "0"))
(R
(FullPartName "R.Normal")
(LibraryName
"D:\ORCAD\ORCAD_16.5_LITE\TOOLS\CAPTURE\LIBRARY\PSPICE\ANALOG.OLB")
(DeviceIndex "0")))
(GlobalState
(FileView
(Path "Design Resources")
(Path "Design Resources"
"D:\Schoolwork\AnalogCircuit\CircuitExp3\circuitexp3.dsn")
(Path "Design Resources"
"D:\Schoolwork\AnalogCircuit\CircuitExp3\circuitexp3.dsn" "SCHEMATIC1")
(Path "Outputs")
(Select "Design Resources"
"D:\Schoolwork\AnalogCircuit\CircuitExp3\circuitexp3.dsn" "SCHEMATIC1"
"PAGE1"))
(HierarchyView)
(Doc
(Type "COrCapturePMDoc")
(Frame
(Placement "44 0 1 -1 -1 -8 -31 0 200 0 430"))
(Tab 0))
(Doc
(Type "COrSchematicDoc")
(Frame
(Placement "44 2 3 -1 -1 -8 -31 52 1475 52 485")
(Scroll "0 0")
(Zoom "321")
(Occurrence "/"))
(Path "D:\SCHOOLWORK\ANALOGCIRCUIT\CIRCUITEXP3\CIRCUITEXP3.DSN")
(Schematic "SCHEMATIC1")
(Page "PAGE1")))
(MPSSessionName "launchcore"))

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