Initial commit
This commit is contained in:
31
Experiments/Shared/ALU.v
Normal file
31
Experiments/Shared/ALU.v
Normal file
@@ -0,0 +1,31 @@
|
||||
module ALU(
|
||||
input [31:0] a,
|
||||
input [31:0] b,
|
||||
input [2:0] AluCtrl,
|
||||
output reg [31:0] AddResult,
|
||||
output reg Zero
|
||||
);
|
||||
parameter ADD = 3'b000;
|
||||
parameter SUB = 3'b001;
|
||||
parameter AND = 3'b010;
|
||||
parameter OR = 3'b011;
|
||||
parameter NOR = 3'b100;
|
||||
parameter SLT = 3'b101;
|
||||
parameter SLTU = 3'b110;
|
||||
parameter PASSB= 3'b111;
|
||||
|
||||
always @(*) begin
|
||||
case (AluCtrl)
|
||||
ADD: AddResult = a + b;
|
||||
SUB: AddResult = a - b;
|
||||
AND: AddResult = a & b;
|
||||
OR: AddResult = a | b;
|
||||
NOR: AddResult = ~(a | b);
|
||||
SLT: AddResult = ($signed(a) < $signed(b)) ? 32'd1 : 32'd0;
|
||||
SLTU: AddResult = (a < b) ? 32'd1 : 32'd0;
|
||||
PASSB:AddResult = b;
|
||||
default: AddResult = 32'hxxxxxxxx;
|
||||
endcase
|
||||
Zero = (AddResult == 32'd0);
|
||||
end
|
||||
endmodule
|
||||
Reference in New Issue
Block a user