Initial commit

Exp3-1/Exp3-1.sim/sim_1/behav/xsim/encoder.tcl

@@ -0,0 +1,11 @@
+set curr_wave [current_wave_config]
+if { [string length $curr_wave] == 0 } {
+  if { [llength [get_objects]] > 0} {
+    add_wave /
+    set_property needs_save false [current_wave_config]
+  } else {
+     send_msg_id Add_Wave-1 WARNING "No top level signals found. Simulator will start without a wave window. If you want to open a wave window go to 'File->New Waveform Configuration' or type 'create_wave_config' in the TCL console."
+  }
+}
+
+run 1000ns

Exp3-1/Exp3-1.sim/sim_1/behav/xsim/encoder_vlog.prj

@@ -0,0 +1,10 @@
+# compile verilog/system verilog design source files
+verilog xil_defaultlib  \
+"../../../../Exp3-1.srcs/sources_1/new/SegDisplayCtrl.v" \
+"../../../../Exp3-1.srcs/sources_1/new/encoder.v" \
+
+# compile glbl module
+verilog xil_defaultlib "glbl.v"
+
+# Do not sort compile order
+nosort

Exp3-1/Exp3-1.sim/sim_1/behav/xsim/glbl.v

@@ -0,0 +1,71 @@
+// $Header: /devl/xcs/repo/env/Databases/CAEInterfaces/verunilibs/data/glbl.v,v 1.14 2010/10/28 20:44:00 fphillip Exp $
+`ifndef GLBL
+`define GLBL
+`timescale  1 ps / 1 ps
+
+module glbl ();
+
+    parameter ROC_WIDTH = 100000;
+    parameter TOC_WIDTH = 0;
+
+//--------   STARTUP Globals --------------
+    wire GSR;
+    wire GTS;
+    wire GWE;
+    wire PRLD;
+    tri1 p_up_tmp;
+    tri (weak1, strong0) PLL_LOCKG = p_up_tmp;
+
+    wire PROGB_GLBL;
+    wire CCLKO_GLBL;
+    wire FCSBO_GLBL;
+    wire [3:0] DO_GLBL;
+    wire [3:0] DI_GLBL;
+   
+    reg GSR_int;
+    reg GTS_int;
+    reg PRLD_int;
+
+//--------   JTAG Globals --------------
+    wire JTAG_TDO_GLBL;
+    wire JTAG_TCK_GLBL;
+    wire JTAG_TDI_GLBL;
+    wire JTAG_TMS_GLBL;
+    wire JTAG_TRST_GLBL;
+
+    reg JTAG_CAPTURE_GLBL;
+    reg JTAG_RESET_GLBL;
+    reg JTAG_SHIFT_GLBL;
+    reg JTAG_UPDATE_GLBL;
+    reg JTAG_RUNTEST_GLBL;
+
+    reg JTAG_SEL1_GLBL = 0;
+    reg JTAG_SEL2_GLBL = 0 ;
+    reg JTAG_SEL3_GLBL = 0;
+    reg JTAG_SEL4_GLBL = 0;
+
+    reg JTAG_USER_TDO1_GLBL = 1'bz;
+    reg JTAG_USER_TDO2_GLBL = 1'bz;
+    reg JTAG_USER_TDO3_GLBL = 1'bz;
+    reg JTAG_USER_TDO4_GLBL = 1'bz;
+
+    assign (strong1, weak0) GSR = GSR_int;
+    assign (strong1, weak0) GTS = GTS_int;
+    assign (weak1, weak0) PRLD = PRLD_int;
+
+    initial begin
+	GSR_int = 1'b1;
+	PRLD_int = 1'b1;
+	#(ROC_WIDTH)
+	GSR_int = 1'b0;
+	PRLD_int = 1'b0;
+    end
+
+    initial begin
+	GTS_int = 1'b1;
+	#(TOC_WIDTH)
+	GTS_int = 1'b0;
+    end
+
+endmodule
+`endif

Exp3-1/Exp3-1.sim/sim_1/behav/xsim/tb_encoder.tcl

@@ -0,0 +1,11 @@
+set curr_wave [current_wave_config]
+if { [string length $curr_wave] == 0 } {
+  if { [llength [get_objects]] > 0} {
+    add_wave /
+    set_property needs_save false [current_wave_config]
+  } else {
+     send_msg_id Add_Wave-1 WARNING "No top level signals found. Simulator will start without a wave window. If you want to open a wave window go to 'File->New Waveform Configuration' or type 'create_wave_config' in the TCL console."
+  }
+}
+
+run 1000ns

Exp3-1/Exp3-1.sim/sim_1/behav/xsim/tb_encoder_vlog.prj

@@ -0,0 +1,11 @@
+# compile verilog/system verilog design source files
+verilog xil_defaultlib  \
+"../../../../Exp3-1.srcs/sources_1/new/SegDisplayCtrl.v" \
+"../../../../Exp3-1.srcs/sources_1/new/encoder.v" \
+"../../../../Exp3-1.srcs/sim_1/new/tb_encoder.v" \
+
+# compile glbl module
+verilog xil_defaultlib "glbl.v"
+
+# Do not sort compile order
+nosort

Exp3-1/Exp3-1.sim/sim_1/behav/xsim/webtalk.jou

@@ -0,0 +1,12 @@
+#-----------------------------------------------------------
+# Webtalk v2018.1 (64-bit)
+# SW Build 2188600 on Wed Apr  4 18:40:38 MDT 2018
+# IP Build 2185939 on Wed Apr  4 20:55:05 MDT 2018
+# Start of session at: Thu Nov  7 01:27:22 2024
+# Process ID: 29492
+# Current directory: F:/Schoolwork/DigitalLogic/Exp3-1/Exp3-1.sim/sim_1/behav/xsim
+# Command line: wbtcv.exe -mode batch -source F:/Schoolwork/DigitalLogic/Exp3-1/Exp3-1.sim/sim_1/behav/xsim/xsim.dir/tb_encoder_behav/webtalk/xsim_webtalk.tcl -notrace
+# Log file: F:/Schoolwork/DigitalLogic/Exp3-1/Exp3-1.sim/sim_1/behav/xsim/webtalk.log
+# Journal file: F:/Schoolwork/DigitalLogic/Exp3-1/Exp3-1.sim/sim_1/behav/xsim\webtalk.jou
+#-----------------------------------------------------------
+source F:/Schoolwork/DigitalLogic/Exp3-1/Exp3-1.sim/sim_1/behav/xsim/xsim.dir/tb_encoder_behav/webtalk/xsim_webtalk.tcl -notrace

Exp3-1/Exp3-1.sim/sim_1/behav/xsim/webtalk_16956.backup.jou

@@ -0,0 +1,12 @@
+#-----------------------------------------------------------
+# Webtalk v2018.1 (64-bit)
+# SW Build 2188600 on Wed Apr  4 18:40:38 MDT 2018
+# IP Build 2185939 on Wed Apr  4 20:55:05 MDT 2018
+# Start of session at: Thu Oct 31 10:47:51 2024
+# Process ID: 16956
+# Current directory: F:/Schoolwork/DigitalLogic/Exp3-1/Exp3-1.sim/sim_1/behav/xsim
+# Command line: wbtcv.exe -mode batch -source F:/Schoolwork/DigitalLogic/Exp3-1/Exp3-1.sim/sim_1/behav/xsim/xsim.dir/tb_encoder_behav/webtalk/xsim_webtalk.tcl -notrace
+# Log file: F:/Schoolwork/DigitalLogic/Exp3-1/Exp3-1.sim/sim_1/behav/xsim/webtalk.log
+# Journal file: F:/Schoolwork/DigitalLogic/Exp3-1/Exp3-1.sim/sim_1/behav/xsim\webtalk.jou
+#-----------------------------------------------------------
+source F:/Schoolwork/DigitalLogic/Exp3-1/Exp3-1.sim/sim_1/behav/xsim/xsim.dir/tb_encoder_behav/webtalk/xsim_webtalk.tcl -notrace

Exp3-1/Exp3-1.sim/sim_1/behav/xsim/webtalk_21852.backup.jou

@@ -0,0 +1,12 @@
+#-----------------------------------------------------------
+# Webtalk v2018.1 (64-bit)
+# SW Build 2188600 on Wed Apr  4 18:40:38 MDT 2018
+# IP Build 2185939 on Wed Apr  4 20:55:05 MDT 2018
+# Start of session at: Wed Nov  6 20:00:38 2024
+# Process ID: 21852
+# Current directory: F:/Schoolwork/DigitalLogic/Exp3-1/Exp3-1.sim/sim_1/behav/xsim
+# Command line: wbtcv.exe -mode batch -source F:/Schoolwork/DigitalLogic/Exp3-1/Exp3-1.sim/sim_1/behav/xsim/xsim.dir/tb_encoder_behav/webtalk/xsim_webtalk.tcl -notrace
+# Log file: F:/Schoolwork/DigitalLogic/Exp3-1/Exp3-1.sim/sim_1/behav/xsim/webtalk.log
+# Journal file: F:/Schoolwork/DigitalLogic/Exp3-1/Exp3-1.sim/sim_1/behav/xsim\webtalk.jou
+#-----------------------------------------------------------
+source F:/Schoolwork/DigitalLogic/Exp3-1/Exp3-1.sim/sim_1/behav/xsim/xsim.dir/tb_encoder_behav/webtalk/xsim_webtalk.tcl -notrace

Exp3-1/Exp3-1.sim/sim_1/behav/xsim/webtalk_3000.backup.jou

@@ -0,0 +1,12 @@
+#-----------------------------------------------------------
+# Webtalk v2018.1 (64-bit)
+# SW Build 2188600 on Wed Apr  4 18:40:38 MDT 2018
+# IP Build 2185939 on Wed Apr  4 20:55:05 MDT 2018
+# Start of session at: Thu Oct 31 10:28:31 2024
+# Process ID: 3000
+# Current directory: F:/Schoolwork/DigitalLogic/Exp3-1/Exp3-1.sim/sim_1/behav/xsim
+# Command line: wbtcv.exe -mode batch -source F:/Schoolwork/DigitalLogic/Exp3-1/Exp3-1.sim/sim_1/behav/xsim/xsim.dir/tb_encoder_behav/webtalk/xsim_webtalk.tcl -notrace
+# Log file: F:/Schoolwork/DigitalLogic/Exp3-1/Exp3-1.sim/sim_1/behav/xsim/webtalk.log
+# Journal file: F:/Schoolwork/DigitalLogic/Exp3-1/Exp3-1.sim/sim_1/behav/xsim\webtalk.jou
+#-----------------------------------------------------------
+source F:/Schoolwork/DigitalLogic/Exp3-1/Exp3-1.sim/sim_1/behav/xsim/xsim.dir/tb_encoder_behav/webtalk/xsim_webtalk.tcl -notrace

Exp3-1/Exp3-1.sim/sim_1/behav/xsim/webtalk_6888.backup.jou

@@ -0,0 +1,12 @@
+#-----------------------------------------------------------
+# Webtalk v2018.1 (64-bit)
+# SW Build 2188600 on Wed Apr  4 18:40:38 MDT 2018
+# IP Build 2185939 on Wed Apr  4 20:55:05 MDT 2018
+# Start of session at: Thu Oct 31 10:28:45 2024
+# Process ID: 6888
+# Current directory: F:/Schoolwork/DigitalLogic/Exp3-1/Exp3-1.sim/sim_1/behav/xsim
+# Command line: wbtcv.exe -mode batch -source F:/Schoolwork/DigitalLogic/Exp3-1/Exp3-1.sim/sim_1/behav/xsim/xsim.dir/encoder_behav/webtalk/xsim_webtalk.tcl -notrace
+# Log file: F:/Schoolwork/DigitalLogic/Exp3-1/Exp3-1.sim/sim_1/behav/xsim/webtalk.log
+# Journal file: F:/Schoolwork/DigitalLogic/Exp3-1/Exp3-1.sim/sim_1/behav/xsim\webtalk.jou
+#-----------------------------------------------------------
+source F:/Schoolwork/DigitalLogic/Exp3-1/Exp3-1.sim/sim_1/behav/xsim/xsim.dir/encoder_behav/webtalk/xsim_webtalk.tcl -notrace

Exp3-1/Exp3-1.sim/sim_1/behav/xsim/webtalk_8340.backup.jou

@@ -0,0 +1,12 @@
+#-----------------------------------------------------------
+# Webtalk v2018.1 (64-bit)
+# SW Build 2188600 on Wed Apr  4 18:40:38 MDT 2018
+# IP Build 2185939 on Wed Apr  4 20:55:05 MDT 2018
+# Start of session at: Thu Oct 31 10:23:45 2024
+# Process ID: 8340
+# Current directory: F:/Schoolwork/DigitalLogic/Exp3-1/Exp3-1.sim/sim_1/behav/xsim
+# Command line: wbtcv.exe -mode batch -source F:/Schoolwork/DigitalLogic/Exp3-1/Exp3-1.sim/sim_1/behav/xsim/xsim.dir/encoder_behav/webtalk/xsim_webtalk.tcl -notrace
+# Log file: F:/Schoolwork/DigitalLogic/Exp3-1/Exp3-1.sim/sim_1/behav/xsim/webtalk.log
+# Journal file: F:/Schoolwork/DigitalLogic/Exp3-1/Exp3-1.sim/sim_1/behav/xsim\webtalk.jou
+#-----------------------------------------------------------
+source F:/Schoolwork/DigitalLogic/Exp3-1/Exp3-1.sim/sim_1/behav/xsim/xsim.dir/encoder_behav/webtalk/xsim_webtalk.tcl -notrace

Exp3-1/Exp3-1.sim/sim_1/behav/xsim/xsim.dir/encoder_behav/Compile_Options.txt

@@ -0,0 +1 @@
+-wto "a4b1bbaf8249442fb09839d8507c4712" --incr --debug "typical" --relax --mt "2" -L "xil_defaultlib" -L "unisims_ver" -L "unimacro_ver" -L "secureip" --snapshot "encoder_behav" "xil_defaultlib.encoder" "xil_defaultlib.glbl" -log "elaborate.log" 

Exp3-1/Exp3-1.sim/sim_1/behav/xsim/xsim.dir/encoder_behav/TempBreakPointFile.txt

@@ -0,0 +1 @@
+Breakpoint File Version 1.0

Exp3-1/Exp3-1.sim/sim_1/behav/xsim/xsim.dir/encoder_behav/obj/xsim_1.c

@@ -0,0 +1,111 @@
+/**********************************************************************/
+/*   ____  ____                                                       */
+/*  /   /\/   /                                                       */
+/* /___/  \  /                                                        */
+/* \   \   \/                                                         */
+/*  \   \        Copyright (c) 2003-2013 Xilinx, Inc.                 */
+/*  /   /        All Right Reserved.                                  */
+/* /---/   /\                                                         */
+/* \   \  /  \                                                        */
+/*  \___\/\___\                                                       */
+/**********************************************************************/
+
+
+#include "iki.h"
+#include <string.h>
+#include <math.h>
+#ifdef __GNUC__
+#include <stdlib.h>
+#else
+#include <malloc.h>
+#define alloca _alloca
+#endif
+/**********************************************************************/
+/*   ____  ____                                                       */
+/*  /   /\/   /                                                       */
+/* /___/  \  /                                                        */
+/* \   \   \/                                                         */
+/*  \   \        Copyright (c) 2003-2013 Xilinx, Inc.                 */
+/*  /   /        All Right Reserved.                                  */
+/* /---/   /\                                                         */
+/* \   \  /  \                                                        */
+/*  \___\/\___\                                                       */
+/**********************************************************************/
+
+
+#include "iki.h"
+#include <string.h>
+#include <math.h>
+#ifdef __GNUC__
+#include <stdlib.h>
+#else
+#include <malloc.h>
+#define alloca _alloca
+#endif
+typedef void (*funcp)(char *, char *);
+extern int main(int, char**);
+extern void execute_2(char*, char *);
+extern void execute_5(char*, char *);
+extern void execute_6(char*, char *);
+extern void execute_11(char*, char *);
+extern void execute_12(char*, char *);
+extern void execute_13(char*, char *);
+extern void execute_14(char*, char *);
+extern void execute_4(char*, char *);
+extern void execute_8(char*, char *);
+extern void execute_9(char*, char *);
+extern void execute_10(char*, char *);
+extern void execute_15(char*, char *);
+extern void execute_16(char*, char *);
+extern void execute_17(char*, char *);
+extern void execute_18(char*, char *);
+extern void execute_19(char*, char *);
+extern void vlog_transfunc_eventcallback(char*, char*, unsigned, unsigned, unsigned, char *);
+funcp funcTab[17] = {(funcp)execute_2, (funcp)execute_5, (funcp)execute_6, (funcp)execute_11, (funcp)execute_12, (funcp)execute_13, (funcp)execute_14, (funcp)execute_4, (funcp)execute_8, (funcp)execute_9, (funcp)execute_10, (funcp)execute_15, (funcp)execute_16, (funcp)execute_17, (funcp)execute_18, (funcp)execute_19, (funcp)vlog_transfunc_eventcallback};
+const int NumRelocateId= 17;
+
+void relocate(char *dp)
+{
+	iki_relocate(dp, "xsim.dir/encoder_behav/xsim.reloc",  (void **)funcTab, 17);
+
+	/*Populate the transaction function pointer field in the whole net structure */
+}
+
+void sensitize(char *dp)
+{
+	iki_sensitize(dp, "xsim.dir/encoder_behav/xsim.reloc");
+}
+
+void simulate(char *dp)
+{
+	iki_schedule_processes_at_time_zero(dp, "xsim.dir/encoder_behav/xsim.reloc");
+	// Initialize Verilog nets in mixed simulation, for the cases when the value at time 0 should be propagated from the mixed language Vhdl net
+	iki_execute_processes();
+
+	// Schedule resolution functions for the multiply driven Verilog nets that have strength
+	// Schedule transaction functions for the singly driven Verilog nets that have strength
+
+}
+#include "iki_bridge.h"
+void relocate(char *);
+
+void sensitize(char *);
+
+void simulate(char *);
+
+extern SYSTEMCLIB_IMP_DLLSPEC void local_register_implicit_channel(int, char*);
+extern void implicit_HDL_SCinstatiate();
+
+extern int xsim_argc_copy ;
+extern char** xsim_argv_copy ;
+
+int main(int argc, char **argv)
+{
+    iki_heap_initialize("ms", "isimmm", 0, 2147483648) ;
+    iki_set_sv_type_file_path_name("xsim.dir/encoder_behav/xsim.svtype");
+    iki_set_crvs_dump_file_path_name("xsim.dir/encoder_behav/xsim.crvsdump");
+    void* design_handle = iki_create_design("xsim.dir/encoder_behav/xsim.mem", (void *)relocate, (void *)sensitize, (void *)simulate, 0, isimBridge_getWdbWriter(), 0, argc, argv);
+     iki_set_rc_trial_count(100);
+    (void) design_handle;
+    return iki_simulate_design();
+}

Exp3-1/Exp3-1.sim/sim_1/behav/xsim/xsim.dir/tb_encoder_behav/Compile_Options.txt

@@ -0,0 +1 @@
+-wto "a4b1bbaf8249442fb09839d8507c4712" --incr --debug "typical" --relax --mt "2" -L "xil_defaultlib" -L "unisims_ver" -L "unimacro_ver" -L "secureip" --snapshot "tb_encoder_behav" "xil_defaultlib.tb_encoder" "xil_defaultlib.glbl" -log "elaborate.log" 

Exp3-1/Exp3-1.sim/sim_1/behav/xsim/xsim.dir/tb_encoder_behav/TempBreakPointFile.txt

@@ -0,0 +1 @@
+Breakpoint File Version 1.0

Exp3-1/Exp3-1.sim/sim_1/behav/xsim/xsim.dir/tb_encoder_behav/obj/xsim_1.c

@@ -0,0 +1,116 @@
+/**********************************************************************/
+/*   ____  ____                                                       */
+/*  /   /\/   /                                                       */
+/* /___/  \  /                                                        */
+/* \   \   \/                                                         */
+/*  \   \        Copyright (c) 2003-2013 Xilinx, Inc.                 */
+/*  /   /        All Right Reserved.                                  */
+/* /---/   /\                                                         */
+/* \   \  /  \                                                        */
+/*  \___\/\___\                                                       */
+/**********************************************************************/
+
+
+#include "iki.h"
+#include <string.h>
+#include <math.h>
+#ifdef __GNUC__
+#include <stdlib.h>
+#else
+#include <malloc.h>
+#define alloca _alloca
+#endif
+/**********************************************************************/
+/*   ____  ____                                                       */
+/*  /   /\/   /                                                       */
+/* /___/  \  /                                                        */
+/* \   \   \/                                                         */
+/*  \   \        Copyright (c) 2003-2013 Xilinx, Inc.                 */
+/*  /   /        All Right Reserved.                                  */
+/* /---/   /\                                                         */
+/* \   \  /  \                                                        */
+/*  \___\/\___\                                                       */
+/**********************************************************************/
+
+
+#include "iki.h"
+#include <string.h>
+#include <math.h>
+#ifdef __GNUC__
+#include <stdlib.h>
+#else
+#include <malloc.h>
+#define alloca _alloca
+#endif
+typedef void (*funcp)(char *, char *);
+extern int main(int, char**);
+extern void execute_7(char*, char *);
+extern void execute_16(char*, char *);
+extern void execute_17(char*, char *);
+extern void execute_18(char*, char *);
+extern void execute_19(char*, char *);
+extern void execute_20(char*, char *);
+extern void execute_3(char*, char *);
+extern void execute_6(char*, char *);
+extern void execute_12(char*, char *);
+extern void execute_13(char*, char *);
+extern void execute_14(char*, char *);
+extern void execute_15(char*, char *);
+extern void execute_5(char*, char *);
+extern void execute_9(char*, char *);
+extern void execute_10(char*, char *);
+extern void execute_11(char*, char *);
+extern void execute_21(char*, char *);
+extern void execute_22(char*, char *);
+extern void execute_23(char*, char *);
+extern void execute_24(char*, char *);
+extern void execute_25(char*, char *);
+extern void vlog_transfunc_eventcallback(char*, char*, unsigned, unsigned, unsigned, char *);
+funcp funcTab[22] = {(funcp)execute_7, (funcp)execute_16, (funcp)execute_17, (funcp)execute_18, (funcp)execute_19, (funcp)execute_20, (funcp)execute_3, (funcp)execute_6, (funcp)execute_12, (funcp)execute_13, (funcp)execute_14, (funcp)execute_15, (funcp)execute_5, (funcp)execute_9, (funcp)execute_10, (funcp)execute_11, (funcp)execute_21, (funcp)execute_22, (funcp)execute_23, (funcp)execute_24, (funcp)execute_25, (funcp)vlog_transfunc_eventcallback};
+const int NumRelocateId= 22;
+
+void relocate(char *dp)
+{
+	iki_relocate(dp, "xsim.dir/tb_encoder_behav/xsim.reloc",  (void **)funcTab, 22);
+
+	/*Populate the transaction function pointer field in the whole net structure */
+}
+
+void sensitize(char *dp)
+{
+	iki_sensitize(dp, "xsim.dir/tb_encoder_behav/xsim.reloc");
+}
+
+void simulate(char *dp)
+{
+	iki_schedule_processes_at_time_zero(dp, "xsim.dir/tb_encoder_behav/xsim.reloc");
+	// Initialize Verilog nets in mixed simulation, for the cases when the value at time 0 should be propagated from the mixed language Vhdl net
+	iki_execute_processes();
+
+	// Schedule resolution functions for the multiply driven Verilog nets that have strength
+	// Schedule transaction functions for the singly driven Verilog nets that have strength
+
+}
+#include "iki_bridge.h"
+void relocate(char *);
+
+void sensitize(char *);
+
+void simulate(char *);
+
+extern SYSTEMCLIB_IMP_DLLSPEC void local_register_implicit_channel(int, char*);
+extern void implicit_HDL_SCinstatiate();
+
+extern int xsim_argc_copy ;
+extern char** xsim_argv_copy ;
+
+int main(int argc, char **argv)
+{
+    iki_heap_initialize("ms", "isimmm", 0, 2147483648) ;
+    iki_set_sv_type_file_path_name("xsim.dir/tb_encoder_behav/xsim.svtype");
+    iki_set_crvs_dump_file_path_name("xsim.dir/tb_encoder_behav/xsim.crvsdump");
+    void* design_handle = iki_create_design("xsim.dir/tb_encoder_behav/xsim.mem", (void *)relocate, (void *)sensitize, (void *)simulate, 0, isimBridge_getWdbWriter(), 0, argc, argv);
+     iki_set_rc_trial_count(100);
+    (void) design_handle;
+    return iki_simulate_design();
+}