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Exp5-1/Exp5-1.srcs/sim_1/new/DFlipFlop_tb.v
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Exp5-1/Exp5-1.srcs/sim_1/new/DFlipFlop_tb.v
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`timescale 1ns / 1ps
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//////////////////////////////////////////////////////////////////////////////////
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// Company:
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// Engineer:
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//
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// Create Date: 2024/11/24 20:30:43
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// Design Name:
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// Module Name: DFlipFlop_tb
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// Project Name:
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// Target Devices:
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// Tool Versions:
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// Description:
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//
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// Dependencies:
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//
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// Revision:
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// Revision 0.01 - File Created
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// Additional Comments:
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//
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//////////////////////////////////////////////////////////////////////////////////
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module DFlipFlop_tb;
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reg D, clk;
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wire Q;
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DFlipFlop uut (
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.D(D),
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.clk(clk),
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.Q(Q)
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);
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initial begin
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clk = 0;
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forever #10 clk = ~clk;
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end
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initial begin
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D = 0; #15;
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D = 1; #20;
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D = 0; #20;
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$stop;
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end
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endmodule
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