Small patch to supress a warning
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@@ -2,8 +2,8 @@
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# Webtalk v2018.1 (64-bit)
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# SW Build 2188600 on Wed Apr 4 18:40:38 MDT 2018
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# IP Build 2185939 on Wed Apr 4 20:55:05 MDT 2018
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# Start of session at: Wed Jun 18 18:14:22 2025
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# Process ID: 41168
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# Start of session at: Wed Jun 18 18:21:59 2025
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# Process ID: 8708
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# Current directory: D:/Schoolwork/ComputerComposition/LA32R/Hardware/LA32R.sim/sim_1/behav/xsim
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# Command line: wbtcv.exe -mode batch -source D:/Schoolwork/ComputerComposition/LA32R/Hardware/LA32R.sim/sim_1/behav/xsim/xsim.dir/cpu_tb_snapshot/webtalk/xsim_webtalk.tcl -notrace
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# Log file: D:/Schoolwork/ComputerComposition/LA32R/Hardware/LA32R.sim/sim_1/behav/xsim/webtalk.log
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@@ -2,8 +2,8 @@
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# Webtalk v2018.1 (64-bit)
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# SW Build 2188600 on Wed Apr 4 18:40:38 MDT 2018
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# IP Build 2185939 on Wed Apr 4 20:55:05 MDT 2018
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# Start of session at: Wed Jun 18 18:14:18 2025
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# Process ID: 42736
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# Start of session at: Wed Jun 18 18:21:55 2025
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# Process ID: 35000
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# Current directory: D:/Schoolwork/ComputerComposition/LA32R/Hardware/LA32R.sim/sim_1/behav/xsim
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# Command line: wbtcv.exe -mode batch -source D:/Schoolwork/ComputerComposition/LA32R/Hardware/LA32R.sim/sim_1/behav/xsim/xsim.dir/cpu_tb_snapshot/webtalk/xsim_webtalk.tcl -notrace
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# Log file: D:/Schoolwork/ComputerComposition/LA32R/Hardware/LA32R.sim/sim_1/behav/xsim/webtalk.log
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@@ -2,8 +2,8 @@
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# xsim v2018.1 (64-bit)
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# SW Build 2188600 on Wed Apr 4 18:40:38 MDT 2018
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# IP Build 2185939 on Wed Apr 4 20:55:05 MDT 2018
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# Start of session at: Wed Jun 18 18:14:19 2025
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# Process ID: 2304
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# Start of session at: Wed Jun 18 18:21:56 2025
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# Process ID: 43956
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# Current directory: D:/Schoolwork/ComputerComposition/LA32R/Hardware/LA32R.sim/sim_1/behav/xsim
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# Command line: xsim.exe -log ..\..\..\..\..\simulation.log -mode tcl -source {xsim.dir/cpu_tb_snapshot/xsim_script.tcl}
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# Log file: D:/Schoolwork/ComputerComposition/LA32R/Hardware/LA32R.sim/sim_1/behav/xsim/../../../../../simulation.log
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@@ -38,6 +38,7 @@ module cpu_tb;
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// --- 信号声明 ---
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reg clk; // 时钟信号
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reg rst; // 复位信号
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integer i; // 用于for循环的变量
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// --- 实例化待测设计 (DUT - Design Under Test) ---
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// 将cpu_top模块实例化为uut (unit under test)
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@@ -72,7 +73,7 @@ module cpu_tb;
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$display(" 仿真结束。最终寄存器状态如下: ");
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$display("------------------------------------------------------------");
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// 使用循环遍历寄存器堆,并通过$display显示其值。注意hierarchical path的正确性。
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for (integer i = 0; i < 32; i = i + 1) begin
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for (i = 0; i < 32; i = i + 1) begin
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// 为了简化输出,仅显示值非零的寄存器。
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if (uut.u_reg_file.registers[i] != 32'h00000000) begin
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$display("寄存器 R%0d: 0x%08h", i, uut.u_reg_file.registers[i]);
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