4bc6285c414cba921843af02e0ebb1b0cee45f74
This commit updates all comments in Verilog source files, the Python assembler, and the batch run script to Chinese. Key changes include: - Verilog files (.v): - Header comments (Description, Features, Revision, Additional Comments) translated and updated. - Inline comments translated to Chinese. - Removed [FIX], [NEW] tags, incorporating relevant information into the comments. - assembler.py: - Main docstring and inline comments translated to Chinese. - Removed [FIX] style tags, with details moved to a revision history in the docstring. - Ensured no functional code changes were made. - run.bat: - All user-facing `echo` prompts translated to Chinese. - Comments (::) reviewed and standardized in Chinese. The codebase's logic and functionality remain unchanged. This effort improves readability and maintainability for Chinese-speaking developers by providing comprehensive and standardized documentation directly within the code. Co-authored-by: google-labs-jules[bot] <161369871+google-labs-jules[bot]@users.noreply.github.com>
Description
Computer Composition Course Design
Languages
Verilog
62.3%
Python
12.7%
Batchfile
8.8%
PureBasic
7.8%
Assembly
7.7%
Other
0.7%